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39968385
Modeling and Simulation of ARM Processor Architecture: Using SystemC
89% of respondents would recommend this to a friend
Item #:
39968385
€ 77
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ARM Cortex- M3 processor model generated with the help of a modeling and verification tool like SystemC having inbuilt functions to reduce coding complexity.
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What Stands Out
Comprehensive Coverage
This book offers extensive insights into ARM processor architecture, making it ideal for students and professionals seeking to deepen their understanding of modeling and simulation using SystemC.
Practical Approach
With a focus on real-world applications, the text provides practical examples and exercises that help readers apply theoretical concepts to actual ARM processor scenarios, enhancing learning outcomes.
Expert Insights
Written by domain experts, this book includes industry best practices and advanced techniques in processor modeling, ensuring readers gain valuable knowledge relevant to current and future technology trends.
Product Details
- Presents modeling and verification of ARM Cortex-M3 processor using SystemC
- Highlights the benefits of using a software model for verifying functionalities of slave devices
- Explains the advantages of using a software model over hard model for verifications
- Details the features and technology of ARM Cortex-M3 processor, a 32-bit RISC processor based on Thumb-2 core technology
- Explains the increasing demand for RISC architecture in high-end embedded applications like mobile phones
- Describes the simplicity of ARM architecture instructions with fixed-length and easy pipelining for achieving single clock cycle throughput at higher frequencies
| Publisher | LAP LAMBERT Academic Publishing |
| Publication date | June 29, 2012 |
| Language | English |
| Print length | 156 pages |
| ISBN-10 | 365912088X |
| ISBN-13 | 978-3659120886 |
| Item Weight | 8.4 ounces (238.14 grams) |
| Dimensions | 5.91 x 0.36 x 8.66 inches (15 x 0.9 x 22 cm) |
Who Should Buy?
-
Computer Engineering Students
Ideal for students studying computer architecture and embedded systems who want practical insights into ARM processors.
-
Professionals in Embedded Systems
Useful for engineers and professionals developing software and hardware solutions using ARM architecture.
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Researchers in Electronics
Beneficial for researchers focusing on the innovation of ARM processor technologies and simulation techniques.
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Beginners in Programming
Not suitable for those without a foundational understanding of programming or computer architecture concepts.
Product Description
Modeling and Simulation of ARM Processor Architecture: Using SystemC
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Electronics Editorial Review
Modeling and Simulation of ARM Processor Architecture: Using SystemC provides a comprehensive insight into the ARM processor's architecture through a simulation lens. Published by LAP LAMBERT Academic Publishing on June 29, 2012, this English-language book spans 156 pages, making it an informative yet concise resource for readers seeking a deep understanding of ARM architecture. The weight of 8.4 ounces makes it relatively light and easy to handle, while its compact dimensions of 5.91 x 0.36 x 8.66 inches ensure portability. This book is particularly beneficial for students and professionals involved in computer architecture and hardware design, offering valuable knowledge and practical simulation techniques.
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Pros
- Offers clear explanations of ARM architecture
- Well-structured for educational purposes
- Compact size makes it portable
- Suitable for both students and professionals
- Includes practical simulation examples
Cons
- Limited publication date may not cover latest advancements
Product Price History
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Features & Benefits
- - The book Models ARM Cortex- M3 processor architecture.
- - Uses SystemC to model and verify Processor functions.
- - ARM Cortex – M3 is a 32-bit RISC processor based on Thumb-2 core technology.
- - Architecture has simpler instructions, fixed-length, easy-pipelining, and high throughput.
- - Ideal for high-end embedded applications with space, power, and cost constraints.
- - RISC architecture preferred against CISC.
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